Assess PCB assembly fault coverage and find board build errors quicker

Graphical viewing tool for layouts and schematics

Assess PCB assembly fault coverage and find board build errors quicker

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JTAG Technologies is excited to announce the latest version of the Visualizer graphical viewing tool for board (PCB) layouts and schematics. Allowing users to assess fault coverage data and pin-point production test faults in a snap.

Wide-ranging CAD support

Professional boundary-scan development and test engineers and other users can import schematic data direct from Mentor (Pads, DxDesigner, Capture), Cadence, Altium, and Zuken tools, as well as, board layout information in ODB++ and a dozen other vendor specific formats.

Maps

The maps feature offers a basic test-accessibility view by a simple click of the mouse. The view can be easily fine-tuned by adding just a few key component descriptions to a look up table. Customizable colors can be used to indicate test coverage levels or access types to display a color-coded schematic. Once the design has been optimized for boundary-scan test coverage and committed to layout, final application development can begin in the ProVision developer tool.

Additional features

  • Visualize on (Test) Fail- when running a test sequence or a test debug, it is now possible to automatically view all failing circuit nets on a schematic view, a layout view or both. This is ideal for small-scale production systems where the test operator is also responsible for fault diagnosis and rework.
  • Locate Next- during fault-finding, the ‘locate next’ feature allows the user to track the course of a net connection through the layers of a PCB layout or the sheets of a schematic.
  • Multiple Color Themes-can be defined for distinguishing different net classifications e.g. for percentage fault coverage in schematics or fault nets in layouts to aid in debug and repair.
  • View through layers- a highlighted fault net can now be viewed along its entire path and as it changes course through the PCB layers.
  • Add notes- can be added anywhere at a fixed position on the schematic or layout. Ideal for conveying additional information about test processes or passing design details back and forth between users.

ATE Integration: Simple and effective improvement of test coverage

It is now possible to combine the company’s boundary-scan tools with todays’ existing automatic test equipment (ATE). JTAG works with any vendor of in-circuit testers (ICT), flying probes (FPT) or functional testers (FT).

ATE integration is completely trouble free and merely involves adapting execution software to operate in the specific ATE environment. In many fault coverage s, the company develops dedicated, customized versions of the boundary-scan controllers or pods. This simplifies mechanical integration and preserves signal integrity.

www.jtag.com

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